Available Posts: – 35 (Vacancies)
Job Description
– Knowledge of FPGA programming from requirements to validation
– Knowledge of Verilog / System Verilog / VHDL
Salary: 5,00,000 – 10,00,000 P.A
Role Category: Programming & Design
Role: Hardware Design Engineer / Programmer Analyst
Key Skills
FPGA
Xilinx
Programming (C/C++)
validation
o Knowledge in FPGA/ASIC-based design and verification.
o Expertise in C programming.
o Design in VHDL , Verilog and SystemVerilog.
o Knowledge in working with Xilinx IDE/toolchain (ISE/Vivado)
Experience: 2 – 5 years
Office Type – Work From Office
Office Timing – 9:30 am to 6:30 pm
Working Hours: 9 hrs/day
Working Days: 6 days/week, Sundays are off.
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