Job Description
Seize the opportunity to work with the team responsible for RTL logic design and microarchitecture of chipsets for PCs millions of people around the world will use. The Chipsets Logic Team, CLT is part of the IP, Security and Client Product Group, ISCP within Design Engineering Group, DEG and is responsible for developing soft IPs, subsystems and gaskets for client and server chipsets.
This job requisition is to seek an experienced, disciplined and collaborative design verification engineer in Bangalore.
IP Design Verification Engineer responsibilities include, but is not limited to:
– Developing pre-silicon functional verification tests to verify system will meet design requirements.
– Creating test plans for RTL verification defining and running system simulation models and finding and implementing corrective measures for failing RTL tests Analyzes and uses results to modify testing.
– The candidate will work as a member of a verification team playing a key leading role in developing IPs. The responsibilities will include but not be limited to:
– Create review and signoff verification test plans.
– Drive and participate in discussions across various disciplines to get a clear understanding of product features and their verification requirements.
– Develop the architecture and design of the verification environment in UVM.
– Development of test plans test bench BFMs checkers monitors trackers scoreboard and functional coverage.
– Develop run debug tests in SystemVerilog and UVM
– Mentor other engineers in using the verification infrastructure and creating test benches.
– Ownership of verification of block/ cluster in IP.
– Drive and participate in verification code functional coverage RTL code coverage reviews and provide implement feedback across the project.
– Contribute to the development and maintenance of long-term design verification strategy.
– Track progress of the block/ cluster owned to achieve goals timely.
– Provide indicators and guidance to management on issues and roadblocks on a timely basis.
You are:
– An excellent communicator
– Extremely organized
– A team player who loves to collaborate
– A strong technical leader who communicates well with great influencing skills
– Passionate for design/tools and methodology
– Someone who meets their commitments
– Motivated
– Self-driven
– Someone who wants to make a difference through technology
We are:
– Open to new ideas and methodologies
– A collaborative team demonstrating the best teamwork across Intel
– Here to help you succeed
– People who want to do innovative things
If your skillsets align with our needs, we will provide you a great path to maximize your positive impact on the world.
Qualifications
Other technical requirements:
– 7+ years of relevant pre-silicon verification experience
– 7+ years of pre-silicon verification experience with various tools and methodologies including but not limited to: System Verilog, Python/Perl/Shell scripting, power-aware simulation with VCS/Synopsys tools, RTL model build, design-for-test, design-for-verification.
– Experienced in developing test plan and contents and coverage points for validation purpose based on High Level Architecture specifications
– Experienced in Power-aware design and validation flows.
– Experienced in AMBA, I3C and other serial protocols, OCP or any industry standard BUS protocol.
– RTL model build and testbench development flow, performance verification, coverage based random constraint simulation, etc.
Inside this Business Group
In the Design Engineering Group (DEG), we take pride in developing the best-in-class SOCs, Cores, and IPs that power Intel’s products. From development, to integration, validation, and manufacturing readiness, our mission is to deliver leadership products through the pursuit of Moore’s Law and groundbreaking innovations. DEG is Intel’s engineering group, supplying silicon to business units as well as other engineering teams. As a critical provider of all Intel products, DEG leadership has a responsibility to ensure the delivery of these products in a cost efficient and effective manner.
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here. (https://jobs.intel.com/en/benefits)
It has come to our notice that some people have received fake job interview letters ostensibly issued by Intel, inviting them to attend interviews in Intel’s offices for various positions and further requiring them to deposit money to be eligible for the interviews. We wish to bring to your notice that these letters are not issued by Intel or any of its authorized representatives. Hiring at Intel is based purely on merit and Intel does not ask or require candidates to deposit any money. We would urge people interested in working for Intel, to apply directly at https://jobs.intel.com/ and not fall prey to unscrupulous elements.
Working Model
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. In certain circumstances the work model may change to accommodate business needs.
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